The input and output of signals respectively to and from various circuitry relies upon the use of input/output (I/O) terminal pins located at the interface between the circuit and the "outside world". Such I/O pins are typically included as part of the packaging associated with the numerous integrated circuits finding application in a broad spectrum of present day products. Advances in state-of-the-art integrated circuit design have made it possible to control many more input/output signal lines with a single circuit chip. However, existing integrated circuit (IC) package designs have difficulty in accommodating the number of I/O terminal pins required for medium scale and large scale integrated circuits (MSI, LSI).
In many instances, the requirement to establish an address in a particular addressable integrated circuit device is accommodated by connecting selected logic signal levels to respective ones of a plurality of I/O terminal pins dedicated to the sole function of entering that address into the circuitry. Such use of those I/O terminal pins has typically prevented their use for other functions such as data output. On the other hand, some systems employing a distributed intelligence architecture place the responsibility for address establishment on the centrally located system intelligence point. In such instance, a central controller is typically required to establish the addresses for a plurality of remote IC devices, thus requiring undesirable overhead for address maintenance at the central control device. Such overhead typically includes centrally controlled "system initialization" programming routines for establishing the respective addresses.